1. Field of the Invention
The present invention generally relates to a transmission device. More particularly, the present invention relates to a transmission device which adapts to various network configurations in a synchronous multiplex transmission network.
2. Description of the Related Art
Because of an increase of traffic, the use of synchronous multiplex transmission which utilizes optical communications for high-capacity transmission is in high demand. Especially, a synchronous multiplex transmission system which has a capability of transmission line switching in case of transmission line failure and which can form a ring, such as SONET, is widely used from the viewpoint of supporting diverse network configurations and ensuring reliability of a network.
An ADM (Add/Drop multiplexer) device, for example, is used as a transmission node of a synchronous multiplex ring transmission network. The ADM device can access a desired VT channel in an STS signal, where STS is a channel hierarchy of SONET.
FIGS. 1A and 1B are conceptual diagrams for explaining UPSR which is a transmission line switching system in a SONET ring network. UPSR, an abbreviation of Unidirectional Path Switched Ring, is an example of a system in which a path is switched and is recovered by selecting, at a receiving node, either of two path signals which are sent in two different directions over the synchronous multiplex transmission network from a sending node. In FIGS. 1A and 1B, each of a node A 1, a node B 2, a node C 3, and a node D 4 is a node which constitutes a SONET ring, and FIGS. 1A and B show a case in which a signal enters the node A 1 and exits from the node C 3.
In FIG. 1A, a signal which enters the node A 1 is sent along two routes, one of the routes going through the node A 1, the node D 4, and the node C 3 and another route going through the node A 1, the node B 2, and the node C 3. Then, the signal from the route along the node A 1, the node D 4, and the node C 3 is selected under normal conditions at the node C 3. A path in a route selected under normal conditions, such as the route along the node A 1, the node D 4, and the node C 3 in the case of FIG. 1, will be called a default path hereinafter.
As shown in FIG. 1B, if a fault occurs in a path between the node A 1 and the node D 4, which fault will cause a communication interruption, the path is switched to a path in the route along the node A 1, the node B 2, and the node C 3 so that the communication continues. A path which is a destination of such a path switching from a default path, such as the path in the route along the node A 1, the node B 2, and the node C 3, will be called a non-default path hereinafter. In addition, the above-mentioned capability will be called path protection switching hereinafter.
FIGS. 2A and 2B are conceptual diagrams of BLSR in a SONET ring network. BLSR is an abbreviation of Bidirectional Line Switch Ring, and is an example of a system which carries out cross connecting on a synchronous multiplex ring transmission network and which restores communication by looping back a signal using a protection channel when a transmission line failure arises. In FIGS. 2A and 2B, each of the node A 1, the node B 2, the node C 3, and the node D 4 is a node which constitutes a SONET ring, and FIGS. 2A and 2B show a case in which a signal enters the node A 1 and exits from the node C 3.
As shown in FIG. 2A, initially, a signal which enters the node A 1 is sent to the node C 3 on the route along the node A 1, the node D 4, and the node C 3. Then, when a transmission failure occurs between the node A 1 and the node D 4, which transmission failure results in a communication interruption, the signal is transmitted through the node A 1, the node B 2, the node C 3, the node D 4, and the node C 3 by using a protection channel.
FIG. 3 shows, as an example, a system block diagram of a transmission device 5 which accesses a desired VT channel in any STS signal of SONET, and mainly shows a part for carrying out channel cross connecting. The transmission device 5 includes an STS cross-connecting part 10 for cross connecting an STS signal, a VT cross-connecting part 20 for cross connecting a VT signal, interface (INF) parts 301-30n, for inputting signals, and interface (INF) parts 401-40n for outputting signals. The STS cross-connecting part 10 includes STS TSI parts 11, 12, 13 for performing cross connection of an STS signal, STS PSW parts 14, 15 for path protection switching in UPSR, and a selector (SEL) 16 for selecting either of a path accessed in the STS level or a path accessed in the VT level. The VT cross-connecting part 20 includes a VT SQL part 21 for performing VT squelch, a VT TSI part 22 for cross connecting a VT level signal, and a VT PSW part 23 for path protection switching in UPSR. Squelch is a process for inserting an alarm indication signal into an unrecoverable channel.
In FIG. 3, signals input from the INF parts 301-30n branch to STS level signals and VT level signals at a branchpoint 24. The STS level signals enter the STS TSI part 12, and are cross connected in terms of STS level, and, if selected at the SEL part 16, the signals are output to the INF parts 401-40n through the STS PSW part 15. The VT level signals are cross connected in the STS TSI part 11 at STS level, and enter the VT cross-connecting part 20 which cross connects the entered signals at the VT level. Then, through the TSI PSW part 23, the signals enter the STS TSI part 13 which cross connects the signals, and, if the signals are selected at the SEL part 16, the signals are output to the INF parts 401-40n. In addition, VT squelch is performed in the VT SQL part 21 in which an alarm indication signal (AIS) is inserted into a VT channel in which a misconnection occurs.
FIG. 4 is a conceptual diagram of a VT access ring for explaining the VT squelch. FIG. 4 shows a BLSR configuration which has two fibers, an inside one and an outside one. Each of the inside line and the outside line has a protection channel and an active channel of BLSR. As shown in FIG. 4, a VT signal added at the node C 3 goes through the node B 2 and is dropped at the node A 1. In this case, the squelch table of the node A 1 includes xe2x80x9c2xe2x80x9d as an STS level source node ID, xe2x80x9c2xe2x80x9d as an STS level destination node ID, and xe2x80x9c3xe2x80x9d as a VT level source node ID. If a failure occurs between an E point 6 and an F point 7, STS level squelch will not be carried out because the node A can recognize the node B in the STS level. As for the VT level, squelch will be carried out for the VT channel signal which has the source node ID xe2x80x9c3xe2x80x9d in the corresponding squelch table because the node A can not recognize the node C. A VT path AIS is inserted into the VT channel for which squelch is carried out.
FIG. 5 is a block diagram of a conventional VT SQL part 21 for performing the above-mentioned VT squelch. A squelch table setting part 60 includes registers which accommodate 28 VT channels per each of STS channels 601-60n, where data setting to each register is performed by a control part 67. xe2x80x9cFar End Node IDxe2x80x9d, that is, the node ID of the farthest node among connected nodes to which data can be transmitted is sent to each of SQL decision parts 621-62n. For example, in the network shown in FIG. 4, when a failure arises at the F point 7, node ID xe2x80x9c4xe2x80x9d is sent from the node D to the node A. Each of the SQL decision parts 621-62n, determines whether VT squelch should be carried out or not on the basis of comparison between the xe2x80x9cFar End Node IDxe2x80x9d and the setting data in the squelch table setting part 60. The result of the decision is stored in each of the latching parts 641-642. Then, a VT path AIS is inserted into channels which are applicable for squelch insertion in a squelch inserting (INS) part 66.
FIG. 6 is a block diagram of the STS PSW part 14, or 15, or VT PSW part 23 in FIG. 3, that is, a block diagram of a part for path protection switching of the above-mentioned UPSR. In FIG. 6, each of default side data 77 and non-default side data 78 is input into a selector (SEL) 76, and either of those data is selected and output. Each alarm of default side data 77 and non-default side data 78 is input to an ALM detection part 70 of a default side and an ALM detection part 71 of a non-default side respectively.
If the ALM detection part 70 of the default side or the ALM detection part 71 of the non-default side detects an alarm, the alarm is sent to an ALM notification register 72. In addition, the ALM detection part 70 of the default side or the ALM detection part 71 of the non-default side notifies a PSW control part 75 of the alarm. If the ALM detection part 70 of the default side detects an alarm during communication, path switching to the non-default side will be performed by the selector (SEL) 76 according to the control of the PSW control part 75.
Now, before a WTR control register 74 is described, WTR will be described. WTR, an abbreviation of xe2x80x9cWait To Restorexe2x80x9d, is a process in which if a default path is switched to a non-default path by a network failure, the default path is recovered from the non-default path after a predetermined time passes from the time when the failure of the default path is fixed.
Information of a working time of the WTR timer is recorded in a WTR control register 74 from a CPU 73. The CPU 73 reads the information and an alarm information stored in the ALM notification register 72 by a polling, and makes a decision on path selection. The PSW control part 75 outputs the path selection information to the selector (SEL) 76 which selects a path.
FIG. 7 is a time chart showing the operation of the above-mentioned WTR. The CPU 73 periodically reads the ALM notification register 72 by polling so as to monitor an alarm of the default path. When an alarm is detected in the default side at the timing of polling 2, the PSW control part switches the default path to the non-default side and keeps the state by the control of the WTR control register 74. After the CPU 73 recognizes a default side alarm at polling 2, when the CPU 73 recognizes disappearance of the alarm at polling 3, the WTR timer starts and the switched path is recovered by the PSW control part 75 if a default side alarm is not detected during the predetermined time of n minutes, which event is recognized by polling 6.
FIG. 8 is a block diagram of a conventional part for generating an STS signal and performing cross connection. Signals input into each of interface (INF) parts 801-80n are assembled into an STS frame in each of the interface (INF) parts 801-80n, and the STS frame is output from each of interface (INF) parts 811-81n after phase adjusting and cross connection is performed in a common part 90.
Since each of the interface (INF) parts 801-80n has the same configuration as that of the interface (INF) part 801, only the interface (INF) part 801 will be described in the following. An STS frame generating part 82 generates an STS frame according to a timing pulse generated by a pulse generating part 84. The generated STS frame is multiplexed by a MUX 86 and sent to the common part 90. The pulse generating part 84 and the MUX 86 operate by a clock from a PLL 88. In addition, the PLL 88 receives a clock from a system clock 100.
The STS signals sent to the common part 90 are out of phase in channels. Therefore, the phase of each channel will be adjusted by replacing a pointer in each of pointer parts 921-92n. The phase adjusted signal of each channel is cross connected in a cross-connecting part 94 and sent to each of the interface (INF) parts 821-82n. The cross-connecting part 94 and the pointer parts 921-92n are operated by a timing pulse from a pulse generating part 96 which operates by receiving a clock from a PLL 98.
FIG. 9 is a time chart showing the operation of the above-mentioned phase adjusting. Each of frames 1xe2x88x92n is generated by a timing pulse generated by the pulse generating part 84 in each of the interface (INF) parts 801-80n. The phase of each frame is adjusted according to common part reference timing from the pulse generating part 96 with the pointer processing in the pointer part 921-92n. In FIG. 9, A1 is a head byte of a frame and J1 is a head byte of a path. As shown in FIG. 9, the phase adjusting process by pointer replacement includes removing the frame which was made in the interface (INF) part from contained paths and accommodating the paths to a new frame.
Recently, as diversification of services is demanded, increased transmission capacity of a transmission device and diversification of a network configuration are demanded. In addition, for the transmission device, further downsizing such as miniaturization and low power consumption is required.
It is an object of the present invention to realize miniaturization of the transmission system and to improve the efficiency of the transmission device.
The above object of the present invention is achieved by a transmission device which cross connects channels on a synchronous multiplex transmission network which forms a ring, and which performs restoration of communication by looping back signals in a protection path when a failure occurs, the transmission device including:
a memory area which stores information for determining whether an alarm indication signal needs to be inserted in a channel or not, wherein the size of the memory area corresponds to the number of channels targeted for the restoration; and
a part which inserts the alarm indication signal in a channel by switching results of the determination according to predetermined information.
According to the above invention, an unnecessary memory area such as unnecessary registers is eliminated and circuits are eliminated. Therefore, miniaturization of the transmission device can be realized.
The above object of the present invention is achieved also by a transmission device which includes a part for switching and recovering a path by selecting either of two path signals on a synchronous multiplex transmission network which forms a ring, wherein the transmission device switches and recovers a path without skipping an event which arises between polling accesses by a CPU of said transmission device.
According to the above invention, it is unnecessary to increase the number of CPU polling accesses. Therefore, efficiency of CPU processing can be achieved.
The above object of the present invention is achieved also by a transmission device which performs cross connection on a synchronous multiplex transmission network, the transmission device including:
a part, provided in each interface part, which performs phase adjusting of channel signals.
According to the above invention, since a pointer replacement circuit for phase adjusting is unnecessary in a common part, circuit concentration in the common part can be avoided, and miniaturization the transmission device and reduction of power consumption can be realized.